RedEye: Analog ConvNet Image Sensor Architecture for Continuous Mobile Vision
By Robert LiKamWa, Yunhui Hou, Yuan Gao, Mia Polansky, Lin Zhong. 2016
215 citations recorded by the source corpus.
Subfields: Cellular and Molecular Neuroscience, Computer Vision and Pattern Recognition, Electrical and Electronic Engineering, ML Systems & Hardware
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Cellular and Molecular Neuroscience
In Computer Vision and Pattern Recognition
- Vivienne Sze
- Tien-Ju Yang
- Yu-hsin Chen
- Joel S. Emer
- Luca Benini
- S. Keckler
- Minsoo Rhu
- Nicholas Donald Lane
In Electrical and Electronic Engineering
- Tien-Ju Yang
- Vivienne Sze
- Joel S. Emer
- Yu-hsin Chen
- Luca Benini
- S. Keckler
- Minsoo Rhu
- John Paul Strachan
In ML Systems & Hardware
- Tien-Ju Yang
- Vivienne Sze
- Yu-hsin Chen
- Joel S. Emer
- Luca Benini
- Lukas Cavigelli
- S. Keckler
- Renzo Andri
Citations in the corpus
- In-datacenter performance analysis of a tensor processing unit (2017, background): “We are pleased by the attention that the architecture community is paying to NN: 15% of the papers at ISCA 2016 were on hardware accelerators for NN [2, 11 , 13, 21, 29, 34, 35, 45, 52]!”
- Flower: A Friendly Federated Learning Research Framework (2020, background): “…has been tremendous progress in enabling the execution of deep learning models on mobile and embedded devices to infer user contexts and behaviors (Fromm et al., 2018; Chowdhery et al., 2019; Malekzadeh et al., 2019; Lee et al., 2019; Yao et al., 2019; LiKamWa et al., 2016; Georgiev et al., 2017).”
- Efficient Processing of Deep Neural Networks: A Tutorial and Survey (2017, background): “RedEye [113] takes this approach even further by performing the entire convolution layer (including convolution, max pooling and quantization) in the analog domain at the sensor.”
- YodaNN: An Architecture for Ultralow Power Binary-Weight CNN Acceleration (2016, methodology): “Efficiencies of 960 GOp/s [48] and 380 GOp/s/W [49] were achieved.”
- ISAAC: A Convolutional Neural Network Accelerator with In-Situ Analog Arithmetic in Crossbars (2016, background): “RedEye [39] moves processing of convolution layers to an image sensor’s analog domain to reduce computational burden.”
- vDNN: Virtualized deep neural networks for scalable, memory-efficient neural network design (2016, methodology): “The key contributions of our work are: • This work is the first to present a detailed, quantitative analysis on GPU-based DNN training , as opposed to recent literature targeting energy-efficient accelerators for DNN inference [20, 21, 22, 23, 24, 25, 26, 27, 28, 29].”
- Scalpel: Customizing DNN pruning to the underlying hardware parallelism (2017, unknown): “For hardware-based methods, different ASIC designs [2, 5, 7, 8, 10, 14, 18, 25, 27, 33, 36, 37] and tools for accelerating DNN on existing platform have been proposed.”
- Virtualizing Deep Neural Networks for Memory-Efficient Neural Network Design (2016, methodology): “ our work are: This work is the first to present a detailed, quantitative analysis on GPU-based DNN training, as opposed to recent literature targeting energy-efficient accelerators for DNN inference [20, 21, 22, 23, 24, 25, 26, 27, 28, 29]. To the best of our knowledge, our work is the first that pr”
- Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks (2017, background): “ctivations. This approach helps remove the computational bottlenecks while at the same time reducing each layer’s memory requirements. A series of accelerator designs have also been proposed for CNNs [58, 59, 60, 61, 62, 63, 64, 65, 66, 24, 67]. Although these ASIC designs improve the energy-efficien”
- A Multitask Grocery Assist System for the Visually Impaired: Smart glasses, gloves, and shopping carts provide auditory and tactile feedback (2017, background): “In addition to the benefits from offering higherlevel analog primitives that improve computational efficiency relative over digital calculations, recent work has highlighted the large system-level benefits of moving early computation to the sensor chip [16], thereby limiting the losses incurred in m”
- AccPar: Tensor Partitioning for Heterogeneous Deep Learning Accelerators (2020, unknown): “[94], EMAT [95], ReRAM-BNN [96], ZARA [97], SNrram [98], Sparse ReRAM Engine [149], RedEye [150], Quantum-SC-NN [151], FloatPIM [152], PUMA [153], FPSA [154] Toolset/Framework Data Parallelism [106], OWT [107], NEUTRAMS [100], Perform-ML [101], Adaptive-Classifier [102], DNNBuilder [103], Group…”
- DeepSense: A Unified Deep Learning Framework for Time-Series Mobile Sensing Data Processing (2016, background): “DeepX [21], RedEye [26], and ConvTransfer [30] reduce the energy consumption or training time of deep neural networks, based on software and hardware, respectively.”