PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator

By Matt T. Yourst. IEEE International Symposium on Performance Analysis of Systems and Software, 2007

427 citations recorded by the source corpus.

Subfields: Computer Networks and Communications, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/4687eee983faa06858a3cacef57f8b0af1c7ca3d

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Citations in the corpus

Shoestring: probabilistic soft error reliability on the cheap (2010, methodology): “The fault injection results presented in this paper are generated using the PTLsim x86 microarchitectural simulator [41].”
TOP-PIM: throughput-oriented programmable processing in memory (2014, neutral): “3% execution time prediction errors [48].”
XTRec: Secure Real-Time Execution Trace Recording on Commodity Platforms (2011, methodology): “Software cycle accurate deterministic simulators such as PTLSim [40] and AMD SimNow [2] are very slow (typically 50 to 1000x slowdown) and do not contain adequate support for com- modity hardware making them unsuitable for online deployments.”
DRAMSim2: A Cycle Accurate Memory System Simulator (2011, methodology): “Additionally, MARSSx86 replaces the Xen hypervisor in PTLSim/X with the open source QEMU emulator, making it easier to integrate DRAMSim2.”
Sniper: Exploring the level of abstraction for scalable and accurate parallel multi-core simulation (2011, background): “Academic simulators, such as M5 [4], GEMS [20] and PTLSim [32] are not truly cycle-accurate compared to real hardware, and therefore they are typically faster, with simulation speeds in the tens to hundreds of KIPS (kilo simulated instructions per second) range.”
S2E: a platform for in-vivo multi-path analysis of software systems (2011, methodology): “PTLsim [41] is a VMbased cycle-accurate x86 simulator that selectively limits profiling to user-specified code ranges to improve scalability.”