An optimal memory allocation scheme for scratch-pad-based embedded systems

By Oren Avissar, R. Barua, D. Stewart. TECS, 2002

338 citations recorded by the source corpus.

Subfields: Computer Networks and Communications, Hardware and Architecture, Information Systems

View Paper: https://www.semanticscholar.org/paper/3bc9781415a954b2b2c0565ee8c6ef5abe560bfa

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Computer Networks and Communications

1. Derek M. Jones
2. Edward A. Lee

In Hardware and Architecture

1. Wen-mei W. Hwu
2. Derek M. Jones
3. Edward A. Lee
4. Sam S. Stone
5. Alberto L. Sangiovanni-Vincentelli

In Information Systems

1. Derek M. Jones
2. Edward A. Lee

Citations in the corpus

• Cyber Physical Systems: Design Challenges (2008, background): “Scratchpad memories can be used in place of caches [3].”
• Review on cyber-physical systems (2017, methodology): “It includes replacing the cache with the scratchpad memory buffer [87], developing temporal semantic described programming languages [88], choosing appropriate”
• The New C Standard (Excerpted material) An Economic and Cultural Commentary (2008, positive): “Avissar, Barua, and Stewart[ 1 ] also used linear programming to obtain an 11.8% reduction in execution time, but by distributing the stack over different storage areas obtained a 44.2% reduction in execution time.”
• Program optimization space pruning for a multithreaded gpu (2008, methodology): “Dealing with the memory bandwidth issue using software-managed local memories has been discussed in prior work [5, 22] and is outside the scope of this work.”