Understanding the efficiency of GPU algorithms for matrix-matrix multiplication
By Kayvon Fatahalian, Jeremy Sugerman, P. Hanrahan. Graphics Hardware, 2004
392 citations recorded by the source corpus.
Subfields: Computer Networks and Communications, Computer Vision and Pattern Recognition, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/3ba5619e6f2928aed12c7dc8f5fbf3c693edaf65
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In Computer Networks and Communications
In Computer Vision and Pattern Recognition
In Hardware and Architecture
Citations in the corpus
- GPU Computing (2008, neutral): “[22] and a solver for dense linear systems by Gallapo et al.”
- Dot-product engine for neuromorphic computing: Programming 1T1M crossbar to accelerate matrix-vector multiplication (2016, methodology): “With conservative assumptions, we built a 1T1M crossbar simulation platform calibrated to experimental data and quantitatively analyzed the performance and efficiency of the DPE compared to a state-of-the-art ASIC.”
- Optimization principles and application performance evaluation of a multithreaded GPU using CUDA (2008, background): “Fata-halian et al. discuss in [11] that low bandwidth cache designs on GPUs limit the types of applications from bene(cid:2)ting from the computational power available on these architectures.”
- Program optimization space pruning for a multithreaded gpu (2008, background): “In particular inflexibility of memory accesses [7, 25] and memory performance [8, 10] were major hurdles.”
- Quantum Chemistry on Graphical Processing Units. 1. Strategies for Two-Electron Integral Evaluation. (2008, background): “Since 16 is not a multiple of 36, some blocks like block ( 4 , 1) calculate primitive integrals which belong to different contracted integrals like (11|12) and (11|13).”