Single-ISA heterogeneous multi-core architectures for multithreaded workload performance
By Rakesh Kumar, Dean M. Tullsen, Parthasarathy Ranganathan, N. Jouppi, Keith I. Farkas. Proceedings. 31st Annual International Symposium on Computer Architecture, 2004., 2004
364 citations recorded by the source corpus.
Subfields: Computer Networks and Communications, Hardware and Architecture, Information Systems
View Paper: https://www.semanticscholar.org/paper/22c48792b83b668da5695c2e7499ae9b18c8b07e
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In Computer Networks and Communications
- Margaret Martonosi
- Canturk Isci
- Steven Swanson
- Pradip Bose
- Yan Solihin
- Timothy Roscoe
- Andrew Baumann
- Alper Buyuktosunoglu
In Hardware and Architecture
- Canturk Isci
- Margaret Martonosi
- Steven Swanson
- Pradip Bose
- Yan Solihin
- Alper Buyuktosunoglu
- Rebecca Isaacs
- Yonggang Wen
In Information Systems
Citations in the corpus
- The multikernel: a new OS architecture for scalable multicore systems (2009, background): “Some will have the same instruction set architecture (ISA) but different performance characteristics [34,59], since a processor with large cores will be inefficient for readily parallelized programs, but one using only small cores will perform poorly on the sequential parts of a program [31,42].”
- Scaling the bandwidth wall: challenges in and avenues for CMP scaling (2009, methodology): “We use chip size estimates from prior work [15, 16] which shows that simpler smaller cores can be up to 80× smaller.”
- An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget (2006, background): “[19, 21] propose heterogeneous CMPs in terms of different core complexities.”
- Conservation cores: reducing the energy of mature computations (2010, background): “Recent work on single-ISA heterogeneous multi-core processors [5, 14, 17, 22, 24] investigates the power and performance trade-offs for CMPs with non-uniform cores.”