SpiNNaker: Mapping neural networks onto a massively-parallel chip multiprocessor
By Muhammad Mukaram Khan, David Roland Lester, Luis A. Plana, Alexander D. Rast, Xin Jin, Eustace Painkras, S. Furber. 2008
309 citations recorded by the source corpus.
Subfields: Cognitive Neuroscience, Electrical and Electronic Engineering
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Cognitive Neuroscience
- Timothée Masquelier
- Kaushik Roy
- Giacomo Indiveri
- B. Linares‐Barranco
- T. Serrano‐Gotarredona
- Priyadarshini Panda
- T. Prodromakis
- Akhilesh R. Jaiswal
In Electrical and Electronic Engineering
- Giacomo Indiveri
- Timothée Masquelier
- Kaushik Roy
- B. Linares‐Barranco
- T. Serrano‐Gotarredona
- Priyadarshini Panda
- Hyoungseop Kim
- T. Prodromakis
Citations in the corpus
- Deep learning in neural networks: An overview (2014, neutral): “…of such models (e.g., Fieres, Schemmel, & Meier, 2008; Glackin, McGinnity, Maguire, Wu, & Belatreche, 2005; Indiveri et al., 2011; Jin et al., 2010; Khan et al., 2008; Liu et al., 2001; Merolla et al., 2014; Neil & Liu, 2014; Roggen, Hofmann, Thoma, & Floreano, 2003; Schemmel, Grubl,Meier,…”
- DianNao: a small-footprint high-throughput accelerator for ubiquitous machine-learning (2014, background): “While many implementations of hardware neurons and neural networks have been investigated in the past two decades [18], the main purpose of hardware neural networks has been fast modeling of biological neural networks [20, 34] for implementing neurons with thousands of connections.”
- STDP and STDP variations with memristors for spiking neuromorphic learning systems (2013, background): “The UK initiative SpiNNaker (Khan et al., 2008) However, the advent of new nanoscale technologies has shed new expectations, giving hopes for the development of ultra-compact, fast and efficient learning and storage mechanisms that may result in affordable, low power, compact, large scale, artificial ”
- Towards spike-based machine intelligence with neuromorphic computing (2019, background): “The ‘Big Brain’ chips ‘Big Brain’ chips 80 are distinguished by integrating millions of neurons and synapses that render spike-based computations 78,81–86 (see Fig.”
- Survey of Machine Learning Accelerators (2020, background): “In recent accelerators, these spiking signals are usually encoded as digital signals, e.g., IBM TrueNorth chip [15], [16], University of Manchester SpiNNaker [17], and Intel’s Loihi [18].”
- Brain Intelligence: Go beyond Artificial Intelligence (2017, methodology): “Other sample vendors, such as Qualcomm’s Zeroth platform [33], IBM’s Truenorth [34], and Manchester University’s SpiNNaker [35] are also in development.”
- NVIDIA Tensor Core Programmability, Performance & Precision (2018, methodology): “In addition, neuromorphic hardware, such as the IBM TrueNorth [9] and SpiNNaker [10] chips, mimics the functioning of spiking neural network.”
- Routing in the brain (2014, background): “Steve Furber and colleagues (Khan et al., 2008) have built massive processing architectures for neural network simulation that are fundamentally organized around packet-switched routing, which, in addition to granting advantages described above, can be run with low energy costs (Sharp et al., 2012).”
- DaDianNao: A Machine-Learning Supercomputer (2014, background): “[30] propose the SpiNNaker system, which is a multi-chip supercomputer where each node contains 20+ ARM9 cores linked by an asynchronous network; the planned target is a million-core machine capable of modeling a billion neurons.”