Yield and speed optimization of a latch-type voltage sense amplifier

By B. Wicht, T. Nirschl, D. Schmitt-Landsiedel. IEEE Journal of Solid-State Circuits, 2004

504 citations recorded by the source corpus.

Subfields: Biomedical Engineering, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/e1c29d3df660295a192aca11f827e955bcf8a39b

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Biomedical Engineering

1. Reza Lotfi
2. Samaneh Babayan Mashhadi
3. Bram Nauta
4. Daniël Schinkel
5. Eric A. M. Klumperink
6. Ed van Tuijl

In Electrical and Electronic Engineering

1. Reza Lotfi
2. Samaneh Babayan Mashhadi
3. Eric A. M. Klumperink
4. Bram Nauta
5. Daniël Schinkel
6. Ed van Tuijl
7. Chih-Fan Liao
8. Shen-Iuan Liu

Citations in the corpus

• Analysis and Design of a Low-Voltage Low-Power Double-Tail Comparator (2014, background): “1 [1], [17].”
• Noise Analysis of Regenerative Comparators for Reconfigurable ADC Architectures (2008, background): “The comparator is very suitable to implement fast and powerefficient ADCs, such as in the architecture proposed in [3], as well as sense amplifiers for SRAMs [12].”
• A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time (2007, background): “Furthermore, the speed and offset of this circuit are very dependent on the common-mode voltage of the input Vcm [4], which is a problem in applications with wide common-mode ranges, for example A/D converters.”