Robust system design with built-in soft-error resilience

By Subhasish Mitra, N. Seifert, Ming Zhang, Q. Shi, Keesup Kim. Computer, 2005

599 citations recorded by the source corpus.

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Evaluating MapReduce for Multi-core and Multiprocessor Systems (2007, methodology): “To address this shortcoming, one should combine the Phoenix runtime with known error detection techniques [20] [21] [24].”
OCEAN (2014, background): “…reliability issues, such as Negative Bias Temperature Instability (NBTI) [Agostinelli augmentation of error rates and reliability issues, it is evident that prospective embedded systems should have error resiliency as a pivotal design parameter [Henkel et al. 2011; Karakonstantis et al. 2012].”
Design for soft error mitigation (2005, methodology): “For a design where 25% of flip-flops are protected by using one of the above schemes, [56] reports a less than 5% power overhead, 0.”
ReStore: symptom based soft error detection in microprocessors (2005, background): “budgets only allow soft error protection for a fraction of a design, perhaps via replication, error correcting codes, radiation hardened circuits, or error trapping latches [ 18 ].”