Finding a roadmap to achieve large neuromorphic hardware systems

By Jennifer Olson Hasler, Bo Marr. Frontiers in Neuroscience, 2013

388 citations recorded by the source corpus.

Neuromorphic systems are gaining increasing importance in an era where CMOS digital computing techniques are reaching physical limits. These silicon systems mimic extremely energy efficient neural computing structures, potentially both for solving engineering applications as well as understanding neural computation. Toward this end, the authors provide a glimpse at what the technology evolution roadmap looks like for these systems so that Neuromorphic engineers may gain the same benefit of anticipation and foresight that IC designers gained from Moore's law many years ago. Scaling of energy efficiency, performance, and size will be discussed as well as how the implementation and application space of Neuromorphic systems are expected to evolve over time.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/cededbe24d4c29bf33ecd69507ca6c07fc39eaa9

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Electrical and Electronic Engineering

Citations in the corpus

Recent Advances in Physical Reservoir Computing: A Review (2018, methodology): “For hardware implementation of normal RNNs where training is necessary, we often rely on advanced technologies of neural network hardware (Misra & Saha, 2010) and neuromorphic hardware (Hasler & Marr, 2013).”
NeuroSim: A Circuit-Level Macro Model for Benchmarking Neuro-Inspired Architectures in Online Learning (2018, background): “NEURO-INSPIRED computing has attracted a lot of interest as the traditional Boolean computing based on CMOS technology is reaching its physical limits [1].”
Neuro-Inspired Computing With Emerging Nonvolatile Memorys (2018, background): “3 applications [20, 21, 22, 23, 24] and CMOS based neuromorphic circuits [25, 26, 27].”
Implementation of multilayer perceptron network with highly uniform passive memristive crossbar circuits (2017, methodology): “Nevertheless, the energy efficiency of these implementations of convolutional networks (and other neuromorphic systems 8-11 ) remains well below that of their biological prototypes 12,13 , even when the most advanced CMOS technology is used.”
Broadcast and Weight: An Integrated Network For Scalable Photonic Spike Processing (2014, background): “The use of sparse coding principles promises extreme improvements to computational power efficiency in particular [9].”