Improved three-step de-embedding method to accurately account for the influence of pad parasitics in silicon on-wafer RF test-structures

By E. Vandamme, D. Schreurs, G. V. Dinther. 2001

268 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/c2183b252d221135ca05a0e7dd8404a45af2eef5

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Electrical and Electronic Engineering

1. J. Plá
2. John Wood
3. Shan X. Wang
4. Peter H. Aaen
5. K. Hwang
6. Dok Won Lee

In Hardware and Architecture

1. J. Plá
2. John Wood
3. Shan X. Wang
4. Peter H. Aaen
5. K. Hwang
6. Dok Won Lee

Citations in the corpus

• Modeling and Characterization of RF and Microwave Power FETs: About the Authors (2007, methodology): “The probe pads can also introduce a significant lossy capacitance that must be de-embedded from the measurement for an accurate calibration [22].”
• Fabrication and Analysis of High-Performance Integrated Solenoid Inductor With Magnetic Core (2008, methodology): “The values of the inductance, resistance and quality factor were calculated from the Y-parameters of the inductor devices according to the two-port model [19], [20].”
• Accurate Multibias Equivalent-Circuit Extraction for GaN HEMTs (2006, background): “These two admittance parameters and represent the coupling via the metal interconnections and the substrate, respectively, between gate source and drain source pads [24].”