III‐V/silicon photonics for on‐chip and intra‐chip optical interconnects

By Gunther Roelkens, Liu Liu, Di Liang, Richard Jones, A. Fang, B. Koch, John E. Bowers. 2010

578 citations recorded by the source corpus.

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Advances in quantum cryptography (2019, unknown): “The InP platform also has the advantage of building quantum well structures using other ternary and quaternary III–V semiconductors that are lattice-matched to InP, such as InGaAs, InGaAsP, or InAlAsP [287].”
Transfer print techniques for heterogeneous integration of photonic components (2017, unknown): “Silicon photonics has emerged as a very promising for low-cost, universal (design rule based) integration of photonic components [11].”
Experimental demonstration of reservoir computing on a silicon photonics chip (2014, background): “Making active components in SOI is a topic of ongoing research as silicon has an indirect bandgap 23,24 , but as our reservoir is passive we can take full advantage of the maturity of silicon processing technology.”
Hybrid Silicon Photonics for Optical Interconnects (2011, background): “Index Terms—Integrated optoelectronics, optoelectronic devices, semiconductor lasers, silicon-on-insulator (SOI) technology.”
Silicon Photonic Integration Platform—Have We Found the Sweet Spot? (2014, methodology): “The most viable wafer scale type approach for realizing lasers on a silicon waveguide platform today is the hybrid integration platform whereby III–V epitaxial layers are integrated on silicon using wafer-to-wafer and die-to-wafer bonding techniques [12].”