An Efficient Methodology for Mapping Quantum Circuits to the IBM QX Architectures
By Alwin Zulehner, Alexandru Paler, Robert Wille. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2017
402 citations recorded by the source corpus.
In the past years, quantum computers more and more have evolved from an academic idea to an upcoming reality. IBM’s project IBM ${Q}$ can be seen as evidence of this progress. Launched in March 2017 with the goal to provide access to quantum computers for a broad audience, this allowed users to conduct quantum experiments on a 5-qubit and, since June 2017, also on a 16-qubit quantum computer (called IBM QX2 and IBM QX3, respectively). Revised versions of these 5- and 16-qubit quantum computers (named IBM QX4 and IBM QX5, respectively) are available since September 2017. In order to use these, the desired quantum functionality (e.g., provided in terms of a quantum circuit) has to be properly mapped so that the underlying physical constraints are satisfied—a complex task. This demands solutions to automatically and efficiently conduct this mapping process. In this paper, we propose a methodology which addresses this problem, i.e., maps the given quantum functionality to a realization which satisfies all constraints given by the architecture and, at the same time, keeps the overhead in terms of additionally required quantum gates minimal. The proposed methodology is generic, can easily be configured for similar future architectures, and is fully integrated into IBM’s SDK. Experimental evaluations show that the proposed approach clearly outperforms IBM’s own mapping solution. In fact, for many quantum circuits, the proposed approach determines a mapping to the IBM architecture within minutes, while IBM’s solution suffers from long runtimes and runs into a timeout of 1 h in several cases. As an additional benefit, the proposed approach yields mapped circuits with smaller costs (i.e., fewer additional gates are required). All implementations of the proposed methodology are publicly available at http://iic.jku.at/eda/research/ibm_qx_mapping.
Subfields: Artificial Intelligence, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/bbea25a48b757c2efd38dba0ca26627a37bf2022
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Citations in the corpus
- t|ket⟩: a retargetable compiler for NISQ devices (2020, neutral): “We consider this to be a dynamic approach, in contrast to static approaches [78, 79, 80], that partition circuits into parallelised slices of two-qubit interactions, and then use SWAP networks to permute logical qubits between placements that satisfy these slices.”
- Noise-Adaptive Compiler Mappings for Noisy Intermediate-Scale Quantum Computers (2019, background): “Two recent works [71, 72] reduce swap operations and optimize 1-qubit gates for 5-qubit IBM systems.”