Training and operation of an integrated neuromorphic network based on metal-oxide memristors

By Mirko Prezioso, F. Merrikh-Bayat, B. Hoskins, G. Adam, Konstantin K. Likharev, Dmitri B. Strukov. Nature, 2014

2,687 citations recorded by the source corpus.

Despite much progress in semiconductor integrated circuit technology, the extreme complexity of the human cerebral cortex, with its approximately 1014 synapses, makes the hardware implementation of neuromorphic networks with a comparable number of devices exceptionally challenging. To provide comparable complexity while operating much faster and with manageable power dissipation, networks based on circuits combining complementary metal-oxide-semiconductors (CMOSs) and adjustable two-terminal resistive devices (memristors) have been developed. In such circuits, the usual CMOS stack is augmented with one or several crossbar layers, with memristors at each crosspoint. There have recently been notable improvements in the fabrication of such memristive crossbars and their integration with CMOS circuits, including first demonstrations of their vertical integration. Separately, discrete memristors have been used as artificial synapses in neuromorphic networks. Very recently, such experiments have been extended to crossbar arrays of phase-change memristive devices. The adjustment of such devices, however, requires an additional transistor at each crosspoint, and hence these devices are much harder to scale than metal-oxide memristors, whose nonlinear current–voltage curves enable transistor-free operation. Here we report the experimental implementation of transistor-free metal-oxide memristor crossbars, with device variability sufficiently low to allow operation of integrated neural networks, in a simple network: a single-layer perceptron (an algorithm for linear classification). The network can be taught in situ using a coarse-grain variety of the delta rule algorithm to perform the perfect classification of 3 × 3-pixel black/white images into three classes (representing letters). This demonstration is an important step towards much larger and more complex memristive neuromorphic networks.

Subfields: Cellular and Molecular Neuroscience, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/b138688d04eac3153bc4112babecc0106059c220

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In Cellular and Molecular Neuroscience

In Electrical and Electronic Engineering

Citations in the corpus

The future of electronics based on memristive systems (2018, methodology): “For example, memristor hardware performing pattern classification has been demonstrated, initially using a 2 × 10 crossbar 28 and later expanded to a 12 × 12 crossbar 30 .”
Efficient Processing of Deep Neural Networks: A Tutorial and Survey (2017, methodology): “The task of actually fabricating large memristors arrays is still very much a research challenge; for instance, [110] uses a fabricated 12×12 memristor array to demonstrate a linear classifier.”
In-memory computing with resistive switching devices (2018, methodology): “…can be adopted for a broad range of problems, including image compression 91 , sparse coding 93 , and implementation of artificial neural networks (ANNs), where G ij has the meaning of a synaptic weight, V j is a pre-synaptic spike amplitude, and I i is the input signal to the i th neuron 69,70 .”