SpiNNaker: A 1-W 18-Core System-on-Chip for Massively-Parallel Neural Network Simulation

By Eustace Painkras, Luis A. Plana, J. Garside, Steve Temple, Francesco Galluppi, Cameron Patterson, David Roland Lester, Andrew D. Brown, S. Furber. IEEE Journal of Solid-State Circuits, 2013

494 citations recorded by the source corpus.

Subfields: Cellular and Molecular Neuroscience, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/ad2db2e0885b57ab22e01fca4b8b2e688399d8f8

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In Cellular and Molecular Neuroscience

In Electrical and Electronic Engineering

Citations in the corpus

Advancing Neuromorphic Computing With Loihi: A Survey of Results and Outlook (2021, background): “More recent large-scale efforts include the Human Brain Project systems, SpiNNaker [2], and BrainScaleS [3], which were commissioned for the speciﬁc purpose of accelerating neuroscience simulations [4].”
Convolutional networks for fast, energy-efficient neuromorphic computing (2016, methodology): “While we choose the IBM TrueNorth chip [8] for our example deployment platform, the essence of our constructions can apply to other emerging neuromorphic approaches [22][23][24][25] and may lead to new architectures that incorporate deep learning and efficient hardware primitives from the ground up.”
Skimming Digits: Neuromorphic Classification of Spike-Encoded Images (2016, background): “Furthermore, the fact that the Exponential pattern starts at a maximum and then decays to zero opens up interesting methods for analytically calculating and comparing the outputs if the output weights are restricted to positive values only It is also possible to implement the SKIM algorithm on exist”
The SpiNNaker Project (2014, background): “The aggregate SDRAM bandwidth has been measured to be 900 MB/s [8].”
Spike-driven Transformer (2023, background): “Because of the choice that uses spiking neurons and synapses as basic units, neuromorphic chips [43–45, 2, 46, 3, 4] have unique features, such as highly parallel operation, collocated processing and memory, inherent scalability, and spike-driven computing, etc. Typical neuromorphic chips consume…”
Backpropagation for Energy-Efficient Neuromorphic Computing (2015, methodology): “We use the TrueNorth neurosynaptic chip [7] as our example deployment system, though the approach here could be generalized to other neuromorphic hardware [4][5][6].”
A 0.086-mm$^2$ 12.7-pJ/SOP 64k-Synapse 256-Neuron Online-Learning Digital Spiking Neuromorphic Processor in 28-nm CMOS (2018, methodology): “Mixed-signal designs with core analog neuron and synapse computation and high-speed digital periphery are grouped on the left [23]–[25], [27], [63], [64], digital designs are grouped together with ODIN on the right [16], [28]–[31].”
HFirst: A Temporal Approach to Object Recognition (2015, methodology): “Examples of these hardware implementation projects include the Integrate and Fire Array Transceiver (IFAT) [9], Hierarchical AER-IFAT [10], Brain Scales [11], Spiking Neural Network Architecture (SpiNNaker) [12], Neurogrid [7], Qualcomm’s Zeroth Processor, and IBM’s TrueNorth [8] (fabricated with Sa”
Large-scale neuromorphic computing systems (2016, methodology): “These considerations lead to the fundamental design of SpiNNaker, which is based around a small plastic 300 bga (ball grid array) package which incorporates a custom processing chip [26] and a standard 128Mbyte SDRAM memory chip.”
TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip (2015, methodology): “The SpiNNaker project at the University of Manchester is a microprocessor-based system optimized for real-time spiking neural networks, where the aim is to improve the performance of software simulations [12].”
Neuromorphic Electronic Circuits for Building Autonomous Cognitive Systems (2014, methodology): “, using multicast or multistage routing [6], [119], [120].”
DIET-SNN: A Low-Latency Spiking Neural Network With Direct Input Encoding and Leakage and Threshold Optimization (2021, background): “I N RECENT years, a class of neural networks inspired by the event-driven form of computations in the brain has gained popularity for their promise of low-power computing [1], [2].”