Design-Oriented Study of Advanced Synchronous Reference Frame Phase-Locked Loops

By Saeed Golestan, Mohammad Monfared, Francisco D. Freijedo. IEEE transactions on power electronics, 2013

417 citations recorded by the source corpus.

Subfields: Control and Systems Engineering, Electrical and Electronic Engineering, Energy Engineering and Power Technology

View Paper: https://www.semanticscholar.org/paper/a1869bd790db1ae8e917b398003d05767bee1c55

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Control and Systems Engineering

1. Paolo Mattavelli
2. Frede Blaabjerg
3. Dushan Boroyevich
4. M. Cespedes
5. Bo Wen
6. Xiongfei Wang
7. Rolando P. Burgos
8. Zhiyu Shen

In Electrical and Electronic Engineering

1. Frede Blaabjerg
2. Paolo Mattavelli
3. Dushan Boroyevich
4. Xiongfei Wang
5. M. Cespedes
6. Bo Wen
7. Zhiyu Shen
8. Rolando P. Burgos

In Energy Engineering and Power Technology

1. M. Cespedes
2. Jian Sun

Citations in the corpus

• Impedance Modeling and Analysis of Grid-Connected Voltage-Source Converters (2014, methodology): “Since there exist several synchronization schemes [14], the approach taken here is to consider a basic PLL, and show how it can be incorporated into the impedance models.”
• Impedance-Based Analysis of Grid-Synchronization Stability for Three-Phase Paralleled Converters (2014, methodology): “5 is utilized to design the loop filter [32].”
• Three-Phase PLLs: A Review of Recent Advances (2017, neutral): “In addition, the small-signal modeling, stability analysis, and a systematic method for tuning the control parameters of the DCCF-PLL can be found in [31].”