Faster and Timing-Attack Resistant AES-GCM
By Emilia Käsper, Peter Schwabe. Workshop on Cryptographic Hardware and Embedded Systems, 2009
303 citations recorded by the source corpus.
Subfields: Artificial Intelligence, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/9de8fc7a5b0ac7b27e29cadb2cb185056e3dfc29
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Artificial Intelligence
- Daniel Gruss
- Stefan Mangard
- Clémentine Maurice
- Michael Schwarz
- Peter Schwabe
- Tanja Lange
- Ted Krovetz
- Yuval Yarom
In Hardware and Architecture
- Daniel Gruss
- Stefan Mangard
- Tanja Lange
- Daniel J. Bernstein
- Clémentine Maurice
- Adi Shamir
- Peter Schwabe
- Eran Tromer
Citations in the corpus
- Efficient Cache Attacks on AES, and Countermeasures (2010, background): “For AES, bitsliced implementation on popular architectures can offer a throughput comparable to that of lookup-based implementations [52][34][51][35][31][26], but only when several independent blocks are processed in parallel.”
- Cache Template Attacks: Automating Attacks on Inclusive Last-Level Caches (2015, background): “…applications of Flush+Reload have been shown to be quite reliable and powerful, for example, to detect specific versions of cryptographic libraries [24], to revive supposedly fixed attacks (e.g., Lucky 13) [25] as well as to improve attacks against T-table-based AES implementations [18].”
- HomeAlone: Co-residency Detection in the Cloud via Side-Channel Analysis (2011, unknown): “Third, a promising direction is to construct cryptographic implementations that resist cachebased timing attacks (e.g., [29], [ 25 ]).”
- The Security Impact of a New Cryptographic Library (2012, methodology): “We do not mean to say that AES cannot be implemented securely: the NaCl implementation of AES is the bitsliced assembly-language implementation described in [26], together with a portable C implementation following the same approach.”
- The Software Performance of Authenticated-Encryption Modes (2011, background): “Intensively optimized implementations of CTR and GCM are publicly available for the x86.”
- Malware Guard Extension: Using SGX to Conceal Cache Attacks (2017, methodology): “It requires the support of the used cryptography library and hardware support for streaming SIMD (SSE) instructions is necessary to achieve a reasonable performance [72].”