Dark silicon and the end of multicore scaling

By Hadi Esmaeilzadeh, Emily R. Blem, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger. 2011

2,197 citations recorded by the source corpus.

Subfields: Computer Networks and Communications, Hardware and Architecture, ML Systems & Hardware

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Citations in the corpus

A study of mobile device utilization (2015, background): “Several papers have presented work on addressing the Dark Silicon problem [27–30].”
Neural Acceleration for General-Purpose Approximate Programs (2012, background): “Consequently, architectural innovation has become crucial to achieve performance and efﬁciency gains [10].”
ASAP7: A 7-nm finFET predictive process design kit (2016, background): “Notwithstanding the aforementioned improvements, power dissipation has become important to an extent so as to make the use of dark silicon – unpowered regions on a die that prevent it from exceeding the thermal limits – imperative for larger designs [10].”
DianNao: a small-footprint high-throughput accelerator for ubiquitous machine-learning (2014, background): “Due to stringent energy constraints, such as Dark Silicon [10, 32], there is a growing consensus that future highperformance micro-architectures will take the form of heterogeneous multi-cores, i.”
Exponential laws of computing growth (2016, background): “However, doubling on-chip cores every generation has its own heat-dissipation problems that will limit how many cores can be usefully placed on a chip.(11) Moreover, multicore architecture pushed some of the responsibility for speedup to multithreaded programming and parallelizing compilers.”
Heracles: Improving resource efficiency at scale (2015, background): “However, with several imminent challenges in technology scaling [21, 25], alternate approaches are needed.”
Bit Fusion: Bit-Level Dynamically Composable Architecture for Accelerating Deep Neural Network (2017, methodology): “42× capacitance scaling according to the methodology presented in [50].”
Unit Scaling: Out-of-the-Box Low-Precision Training (2023, background): “However, with the end of Moore’s law and Dennard scaling (Esmaeilzadeh et al., 2011; Theis and Wong, 2017), increased transistor density can no longer be relied upon to provide a simple path towards greater efficiency, and other techniques must be leveraged.”
Is dark silicon useful? Harnessing the four horsemen of the coming dark silicon apocalypse (2012, background): “(For subsequent work to [9, 27] on dark silicon and multicore scaling that explores more sophisticated models that incorporate factors such as application space and cache size, see [6, 13, 16].”
Planaria: Dynamic Architecture Fission for Spatial Multi-Tenant Acceleration of Deep Neural Networks (2020, background): “The end of Dennard scaling [5] and diminishing beneﬁts from transistor scaling [6–8] has propelled an era of Domain-Speciﬁc Architectures [9].”
Stripes: Bit-serial deep neural network computing (2016, background): “tends to be the limiting factor in modern high-performance designs, it is essential to achieve better energy efficiency in order to improve performance further under the given power constraints [6].”
Architecture support for disciplined approximate programming (2012, background): “…Research Department of Computer Science & Engineering dburger@microsoft.com {hadianeh,asampson,luisceze}@cs.washington.edu Abstract Disciplined approximate programming lets programmers declare which parts of a program can be computed approximately and consequently at a lower energy cost.”
LINQits: big data on little clients (2013, positive): “Due to stringent energy demands coupled with the recent failure of Dennard Scaling [10, 18, 14, 42, 9], today’s client devices are”
Shenango: Achieving High CPU Efficiency for Latency-sensitive Datacenter Workloads (2019, background): “At the same time, as Moore’s law slows and network rates rise [26], CPU efficiency becomes paramount.”