Extended abstract: The butterfly PUF protecting IP on every FPGA

By Sandeep S. Kumar, Jorge Guajardo, Roel Maes, Geert Jan Schrijen, Pim Tuyls. 2008 IEEE International Workshop on Hardware-Oriented Security and Trust, 2008

686 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/77c72029fede0059b93dff533feecc596f13c2ee

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Electrical and Electronic Engineering

1. Roel Maes
2. Patrick Schaumont
3. Abhranil Maiti
4. M. Tehranipoor
5. Said F. Al-Sarawi
6. Derek Abbott
7. Yansong Gao
8. Vikash Gunreddy

In Hardware and Architecture

1. Roel Maes
2. Patrick Schaumont
3. Abhranil Maiti
4. Yansong Gao
5. Said F. Al-Sarawi
6. Derek Abbott
7. M. Tehranipoor
8. Vikash Gunreddy

Citations in the corpus

• Improved Ring Oscillator PUF: An FPGA-friendly Secure Primitive (2011, methodology): “The FF-PUF [7] and the BPUF [ 10 ] use Fuzzy Extractor for error correction (reliability) and randomness extraction (uniqueness).”
• A Systematic Method to Evaluate and Compare the Performance of Physical Unclonable Functions (2011, methodology): “This paper presented a comparison between SRAM-based PUF, Butterfly PUF [10] and DFF-based PUF.”
• PUF Modeling Attacks on Simulated and Silicon Data (2013, neutral): “1556-6013 © 2013 IEEE IE EE P ro of W eb V er sio n”
• Modeling attacks on physical unclonable functions (2010, methodology): “Typical examples include the SRAM PUF [14, 4], Butterfly PUF [15] and Coating PUF [16].”
• Physical unclonable functions (2020, background): “Similarly, for FPGA platforms without SRAM memories, other mismatch-based PUFs such as latch PUFs 59 , flip-flop PUFs 60,61 and butterfly PUFs 62 are proposed to imitate SRAM PUF behaviour.”
• Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain (2014, background): “Hardware metering and PUFs can detect only cloned and overproduced components, while package ID can aim only for recycled and remarked types.”
• Physically Unclonable Functions: A Study on the State of the Art and Future Research Directions (2010, methodology): “Measurement results from [26] on 64 butterfly PUF cells on 36 FPGAs yield μinter ≈ 50% and μintra < 5% for large temperature variations.”
• A PUF taxonomy (2019, background): “These include flip-flop [76], latch [77], butterfly [78] and buskeeper [79] PUFs, exhibited by Figure 10.”