The influence of the gate dielectrics on threshold voltage instability in amorphous indium-gallium-zinc oxide thin film transistors

By Jae-Seob Lee, Jin-seong Park, Y. Pyo, Dong Bum Lee, Eun Hyun Kim, D. Stryakhilev, Taewoong Kim, D. Jin, Y. Mo. 2009

165 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/76d9c2f15d6c152f3ac752b26c0d96239ef9e642

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In Electrical and Electronic Engineering

1. John F. Conley

Citations in the corpus

• Instabilities in Amorphous Oxide Semiconductor Thin-Film Transistors (2010, methodology): “Differences in the low-field bias stress response may be attributed to many things, including not only the details of the specific dielectric/channel interface [45], [46], [51], deposition methods, and postdeposition annealing but also bias-enhanced interaction between the ambient and the AOS surfac”