Intra-chip wireless interconnect for clock distribution implemented with integrated antennas, receivers, and transmitters
By B. Floyd, C. Hung, K. Kenneth. IEEE J. Solid State Circuits, 2002
362 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/70a9a2cc29769b1aa9e8488b7147421c724a5e3a
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In Electrical and Electronic Engineering
- Partha Pratim Pande
- Satish G. Kandlikar
- Benjamin J. Belzer
- Sujay Deb
- Amlan Ganguly
- Akhilesh V. Bapat
Citations in the corpus
- Scalable Hybrid Wireless Network-on-Chip Architectures for Multicore Systems (2011, neutral): “On-chip wireless interconnects were demonstrated first in [23] for distributing clock signals.”
- The last barrier: on-chip antennas (2013, background): “For example, clock distribution in SoC implementations can benefit from wireless intrachip communication [51], whereas vertically integrated chips in SiP or system-on-package (SoP) can employ wireless interchip communication [52].”
- Wireless NoC as Interconnection Backbone for Multicore Chips: Promises and Challenges (2012, methodology): “Zigzag antennas were initially used to demonstrate performance of on-chip wireless interconnects [13] for distributing clock signals.”
- Review and Projections of Integrated Cooling Systems for Three-Dimensional Integrated Circuits (2014, background): “[70] developed a novel concept of incorporating antennas, receivers, and transmitters on a chip to provide wireless interconnects for clock distribution.”