Dual-threshold voltage techniques for low-power digital circuits

By J. Kao, Anantha P. Chandrakasan. IEEE Journal of Solid-State Circuits, 2000

510 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/6986715f4b640527b488ac96c2154384b0dc0864

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In Electrical and Electronic Engineering

1. Pradip Bose
2. Massoud Pedram
3. Farzan Fallah

Citations in the corpus

• Microarchitectural techniques for power gating of execution units (2004, background): “Prior circuit-level approaches to leakage power reduction include: body-bias control [4], dual-threshold domino circuits [10], input vector control [9] and power-gating [14].”
• Standby and Active Leakage Current Control and Minimization in CMOS VLSI Circuits (2005, methodology): “In practice, Dual VT CMOS or Multi-Threshold CMOS (MTCMOS) is used for power gating [14][15].”