Resistive Random Access Memory (RRAM): an Overview of Materials, Switching Mechanism, Performance, Multilevel Cell (mlc) Storage, Modeling, and Applications
By Furqan Zahoor, Tun Zainal Azni Zulkifli, Farooq Ahmad Khanday. Nanoscale Research Letters, 2020
807 citations recorded by the source corpus.
In this manuscript, recent progress in the area of resistive random access memory (RRAM) technology which is considered one of the most standout emerging memory technologies owing to its high speed, low cost, enhanced storage density, potential applications in various fields, and excellent scalability is comprehensively reviewed. First, a brief overview of the field of emerging memory technologies is provided. The material properties, resistance switching mechanism, and electrical characteristics of RRAM are discussed. Also, various issues such as endurance, retention, uniformity, and the effect of operating temperature and random telegraph noise (RTN) are elaborated. A discussion on multilevel cell (MLC) storage capability of RRAM, which is attractive for achieving increased storage density and low cost is presented. Different operation schemes to achieve reliable MLC operation along with their physical mechanisms have been provided. In addition, an elaborate description of switching methodologies and current voltage relationships for various popular RRAM models is covered in this work. The prospective applications of RRAM to various fields such as security, neuromorphic computing, and non-volatile logic systems are addressed briefly. The present review article concludes with the discussion on the challenges and future prospects of the RRAM.
Subfields: Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/65ecd5a7e631d91fa9e9c7a20b516bcc3ff3f898
Citations in the corpus
- Neuromorphic computing at scale (2025, neutral): “For an emerging memory technology to be viable, the following characteristics are desirable: low energy consumption (≈fJ bit −1 ), low latency, low operating voltages (<1 V), high endurance (>10 17 cycles), high data retention, scalability (<10 nm) and CMOS integration 108 .”