Modeling and analysis of manufacturing variations

By S. Nassif. Proceedings of the IEEE Custom Integrated Circuits Conference, 2001

450 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/5cf384c11d250bfbaef61323f637ad867eafcce6

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Electrical and Electronic Engineering

1. Saibal Mukhopadhyay
2. Hamid Mahmoodi
3. Massoud Pedram
4. Shahin Nazarian
5. Kaushik Roy
6. Yonghong Tian

In Hardware and Architecture

1. Saibal Mukhopadhyay
2. Massoud Pedram
3. Shahin Nazarian
4. Kaushik Roy

Citations in the corpus

• Modeling of failure probability and statistical design of SRAM array for yield enhancement in nanoscaled CMOS (2005, background): “scaling [1]–[5], analysis and reduction of the mismatch-induced parametric failures in an SRAM cell is extremely necessary to enhance the yield of a memory designed in nanoscaled complementary metal–oxide–semiconductor (CMOS) [8], [9].”
• Thermal Modeling, Analysis, and Management in VLSI Circuits: Principles and Methods (2006, background): “This is due to the rising impact of global and random sources of variations on performance characteristics of VLSI circuits [57], which tend to increase the criticality of temperature dependencies in the circuit.”