Asynchronous circuit design

By Chris J. Myers. 2001

321 citations recorded by the source corpus.

Subfields: Artificial Intelligence, Computational Theory and Mathematics, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/51af0c750ab69d0d81a541e793faf2d1d1b52f90

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Artificial Intelligence

1. Jens Spars
2. S. Furber

In Computational Theory and Mathematics

1. Jens Spars
2. S. Furber

In Electrical and Electronic Engineering

1. Jens Spars
2. S. Furber

Citations in the corpus

• Asynchronous Techniques for System-on-Chip Design (2006, unknown): “…interface; C-element; completion tree; dual-rail; globally asynchronous and locally synchronous (GALS); half-buffer; handshake protocol; isochronic fork; metastability; passive–active buffer; precharge half-buffer (PCHB); quasi-delay-insensitive (QDI); stoppable clock; synchronizer”
• Principles of Asynchronous Circuit Design: A Systems Perspective (2010, background): “The interested reader is encouraged to consult [75], [133] or [95] and to specify and synthesize a C-element.”