High performance discrete Fourier transforms on graphics processors

By Naga K. Govindaraju, Brandon Lloyd, Yuri Dotsenko, Burton J. Smith, John Manferdelli. 2008 SC - International Conference for High Performance Computing, Networking, Storage and Analysis, 2008

330 citations recorded by the source corpus.

Subfields: Computational Theory and Mathematics, Hardware and Architecture, Signal Processing

View Paper: https://www.semanticscholar.org/paper/4f97e9854807b2fa3166519b54ee58e02ae317b8

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Citations in the corpus

State-of-the-art in heterogeneous computing (2010, methodology): “…linear algebra Blocking (CBEA) [182]; Data structures (GPU) [23] Fast Fourier transform Auto-tuning (GPU) [124]; Hierarchically decomposed (GPU) [66]; Iterative out-of-place (CBEA) [18]; Communication overheads (CBEA) [184]; Power and resource consumption (FPGA) [115]; Double precision…”
Inter-block GPU communication via fast barrier synchronization (2010, methodology): “On the other hand, computation of an iteration cannot start until that of its previous iteration completes, which makes a barrier necessary across the computation of different iterations [6].”
Debunking the 100X GPU vs. CPU myth: an evaluation of throughput computing on CPU and GPU (2010, background): “• We reexamine a number of claims [9, 19, 21, 32, 42, 45, 47, 53] that GPUs perform 10X to 1000X better than CPUs on a number of throughput kernels/applications.”
A GPGPU compiler for memory optimization and parallelism management (2010, methodology): “[6] as well as the one used in CUFFT2.”