Hyper-Threading Technology Architecture and MIcroarchitecture
By D. Marr. 2002
621 citations recorded by the source corpus.
View Paper: https://www.semanticscholar.org/paper/2fa6d2c346fc2c5c4a0e277364a053aaf4beed3c
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
- Ruby B. Lee
- Trond Runar Hagen
- M. L. Sætra
- Zhenghong Wang
- André Rigland Brodtkorb
- Hari Balakrishnan
- Lizhe Wang
- Andrew J. Younge
Citations in the corpus
- Covert and Side Channels Due to Processor Architecture (2006, methodology): “We implemented this channel on a Pentium-4 processor with hyper-threading (Intels SMT), which supports only two simultaneous threads [16].”
- Graphics processing unit (GPU) programming strategies and trends in GPU computing (2013, background): “available thread in a fashion similar to hyper-threading [14] on”
- Automatic Security Evaluation and (Related-key) Differential Characteristic Search: Application to SIMON, PRESENT, LBlock, DES(L) and Other Bit-Oriented Block Ciphers (2014, methodology): “5 to solve the corresponding MILP instances to exploit Intel’s Hyper-Threading Technology [48], where for each physical core, the operating system simulates two virtual or logical cores, and shares the workload between them.”
- Power-aware scheduling of virtual machines in DVFS-enabled clusters (2009, result): “While the performance of each individual VM is only approximately 67% as fast when using 8 VMs instead of 4, there are twice as many VMs to contribute to an overall performance improvement of 34%, which is consistent with previous reports [38] of optimal speedups when using Hyperthreading.”
- Shenango: Achieving High CPU Efficiency for Latency-sensitive Datacenter Workloads (2019, background): “These threads share processor resources such as the L1 and L2 caches and execution units, but are exposed as two separate logical cores [51].”