Test Wrapper and Test Access Mechanism Co-Optimization for System-on-Chip

By V. Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen. Proceedings International Test Conference 2001 (Cat. No.01CH37260), 2001

411 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/1f9e29ffcd2065d95af2c6015277b3d43f321d85