Efficient virtual memory for big memory servers
By Arkaprava Basu, Jayneel Gandhi, Jichuan Chang, Mark D. Hill, Michael M. Swift. International Symposium on Computer Architecture, 2013
342 citations recorded by the source corpus.
Subfields: Computer Networks and Communications, Hardware and Architecture, Information Systems
View Paper: https://www.semanticscholar.org/paper/1bed30d161683d279780aee34619f94a860fa973
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Computer Networks and Communications
- Saugata Ghose
- Rachata Ausavarungnirun
- Onur Mutlu
- Adwait Jog
- Christopher J. Rossbach
- Jayneel Gandhi
- Vance Miller
- Joshua Landgraf
In Hardware and Architecture
- Saugata Ghose
- Rachata Ausavarungnirun
- Adwait Jog
- Onur Mutlu
- Christopher J. Rossbach
- Jayneel Gandhi
- Vance Miller
- Joshua Landgraf
In Information Systems
- Saugata Ghose
- Rachata Ausavarungnirun
- Christos Kozyrakis
- Onur Mutlu
- Nam Sung Kim
- Christopher J. Rossbach
- A. Belay
- Christina Delimitrou
Citations in the corpus
- NDA: Near-DRAM acceleration architecture leveraging commodity DRAM devices and standard memory modules (2015, background): “Therefore, to ensure the CGRAs read/write data from/into contiguous regions of physical memory, we adopt memory segmentations without paging for the region of memory address space accessed by CGRAs [44].”
- IX: A Protected Dataplane Operating System for High Throughput and Low Latency (2014, background): “We favor large pages due to their reduced address translation overhead [5, 7] and the relative abundance of physical memory resources in modern servers.”
- MASK: Redesigning the GPU Memory Hierarchy to Support Multi-Application Concurrency (2018, background): “Direct segments [22] and redundant memory mappings [64] reduce address translation overheads by mapping large contiguous virtual memory regions to a contiguous physical region.”