Benchmarking SOI and bulk FinFET alternatives for PLANAR CMOS scaling succession

By T. Chiarella, L. Witters, A. Mercha, C. Kerner, M. Rakowski, C. Ortolland, L. Ragnarsson, B. Parvais, A. D. Keersgieter, S. Kubicek and 7 more. 2010

133 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/1b1a791f94ce13837af5c978d6239a27548d7714

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In Electrical and Electronic Engineering

  1. D. Fleetwood

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