Probabilistic Logic and the Synthesis of Reliable Organisms from Unreliable Components
By J. Neumann. 1956
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
- Armin Alaghi
- Sanghamitra Dutta
- Jie Han
- Pulkit Grover
- John Patrick Hayes
- Ziqian Bai
- Elchanan Mossel
- Michael M. Swift
Citations in the corpus
- CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices (2005, unknown): “Indeed, the application of such classical techniques of providing fault tolerance as von Neumann multiplexing [ 9 , 10] or R-MD redundancy [10] to defects becomes rather inefficient for high defect rates.”
- An Architecture for Fault-Tolerant Computation with Stochastic Logic (2011, background): “The topic of computing reliably with unreliable components dates back to von Neumann and Shannon [9], [10].”
- Paxos made live: an engineering perspective (2007, background): “It is well known that fault-tolerance on commodity hardware can be achieved through replication [17, 18].”
- Approximate computing: An emerging paradigm for energy-efficient design (2013, background): “SC was first introduced in the 1960s for logic circuit design [4, 5], but its origin can be traced back to von Neumann’s seminal work on probabilistic logic [6].”
- Survey of Stochastic Computing (2013, background): “[von Neumann 1956] 1960 79 De.nition of SC and introduction of basic concepts.”
- A Unified Coded Deep Neural Network Training Strategy based on Generalized PolyDot codes (2018, methodology): “The problem of reliable computing using unreliable elements was first posed in 1956 by von Neumann [9], speculating that the efficiency and reliability of the human brain is obtained by allowing for low power but errorprone components with redundancy for error-resilience.”
- CMOL: Devices, Circuits, and Architectures (2006, background): “In the usual custom logic circuits the location of a defective gate from outside is hardly possible, while spreading around additional logic gates (e.g., providing von Neumann’s majority multiplexing [ 37 ]) for error detection and correction becomes very inefficient for fairly low fraction q of def”