FreePDK: An Open-Source Variation-Aware Design Kit

By J. Stine, I. D. Castellanos, Michael H. Wood, J. Henson, F. Love, W. R. Davis, P. Franzon, Michael Bucher, S. Basavarajaiah, Julie Oh and 1 more. International Conference on Microelectronics Systems Education, 2007

458 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/151ea06c9c0bbd21ddc823a46626ba662774eabb

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Electrical and Electronic Engineering

1. Muhammad Yasin
2. Ozgur Sinanoglu
3. Jeyavijayan Rajendran
4. Ramesh Karri
5. M. Ashraf
6. M. Nabeel
7. A. Sengupta

In Hardware and Architecture

1. Muhammad Yasin
2. Ozgur Sinanoglu
3. Jeyavijayan Rajendran
4. Ramesh Karri
5. M. Ashraf
6. M. Nabeel
7. A. Sengupta

Citations in the corpus

• On Improving the Security of Logic Locking (2016, methodology): “When compiled using the FreePDK 45 nm library [34], the design has nearly 13K gates as compared to only about 3K or fewer gates in ISCAS circuits.”
• Provably-Secure Logic Locking: From Theory To Practice (2017, methodology): “Œe APD overhead is obtained using Synopsys DC Compiler using Global Foundries 65nm LPe library [43] and is shown in Fig.”