Gate sizing using a statistical delay model
By E. Jacobs, Michel Berkelaar. 2000
105 citations recorded by the source corpus.
This paper is about gate sizing under a statistical delay model. It shows we can solve the gate sizing problem exactly for a given statistical delay model. The formulation used allows many different forms of objective functions, which could for example directly optimize the delay uncertainty at the circuit outputs. We formulate the gate sizing problem as a nonlinear programming problem, and show that if we do this carefully, we can solve these problems exactly for circuits up to a few thousand gates using the publicly available large scale nonlinear programming solver LANCELOT.
Subfields: Industrial and Manufacturing Engineering, Management Science and Operations Research, Safety, Risk, Reliability and Quality
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In Management Science and Operations Research
In Safety, Risk, Reliability and Quality
Citations in the corpus
- Lightweight Probabilistic Deep Networks (2018, background): “For maxpool layers, a closed form solu-tion exists for a two-element input, i.e . mean and variance of the max of two Gaussian distributed inputs can be analytically derived [25].”
- Statistical timing analysis for intra-die process variations with spatial correlations (2003, background): “A number of statistical timing analysis approaches have been proposed in recent years [5-18].”
- Explaining Deep Neural Networks with a Polynomial Time Algorithm for Shapley Values Approximation (2019, background): “Never-theless, it has been shown that the univariate normal is an effective approximation (Gast & Roth, 2018) and the first and second moments, provided also in Appendix E, can be derived analytically (Jacobs & Berkelaar, 2000).”