Programming Massively Parallel Processors. A Hands-on Approach

By Jie Cheng. Scalable Computing : Practice and Experience, 2010

1,944 citations recorded by the source corpus.

Subfields: Computer Networks and Communications, Hardware and Architecture, Information Systems

View Paper: https://www.semanticscholar.org/paper/08608bcd652f947bf596b6886f669a03e670505d

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Citations in the corpus

A quantitative study of irregular programs on GPUs (2012, background): “Recent years have seen a surge of interest in the use of graphics processing units (GPUs) as general-purpose computing accelerators [28].”
Medical image processing on the GPU - Past, present and future (2013, background): “Interested readers are referred to books about GPU programming (Kirk and Hwu, 2010; Sanders and Kandrot, 2011; Farber, 2011) and the CUDA pro-”
High-order finite-element seismic wave propagation modeling with MPI on a large GPU cluster (2010, methodology): “As mentioned in the Introduction, discontinuous Galerkin methods have also been applied to the modeling of seismic waves on CPUs [31–37]; therefore it is likely that based on the ideas of Klöckner et al. [47] to use such techniques on GPUs for Maxwell’s equations they could be adapted to the modelin”
NVIDIA Tensor Core Programmability, Performance & Precision (2018, methodology): “This indicates that it is critical to use CUDA shared memory to reduce memory traffic [19] when programming NVIDIA Tensor Cores.”
A research agenda for augmented and virtual reality in architecture, engineering and construction (2020, background): “In this regard, future research could investigate the adoption of high-performance computing paradigms [106], massive parallelisation [88], in-memory processing [137], among others.”
A Comprehensive Performance Comparison of CUDA and OpenCL (2011, methodology): “To a CUDA/OpenCL programmer , the computing system consists of a host (typically a traditional CPU), and one or more devices that are massively parallel processors equipped with a large number of arithmetic execution units [12].”
Improving GPU performance via large warps and two-level warp scheduling (2011, methodology): “GPU programmers are encouraged to make consecutive threads access consecutive memory locations so that memory accesses can be coalesced [20, 14], implying requests from different warps have significant spatial locality.”
Accelerating Mobile Audio Sensing Algorithms through On-Chip GPU Offloading (2017, positive): “However, a strategy for reducing global memory traffic is to introduce a model-specific version of tiled algorithms used in matrixmatrix multiplication [39].”