A 3-V 340-mW 14-b 75-Msample/s CMOS ADC with 85-dB SFDR at Nyquist input
By Wenhua Yang, D. Kelly, I. Mehr, Mark T. Sayuk, L. Singer. IEEE J. Solid State Circuits, 2001
300 citations recorded by the source corpus.
Subfields: Biomedical Engineering, Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/058791e7886d79301d4434c21466228394437db9
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In Biomedical Engineering
In Electrical and Electronic Engineering
Citations in the corpus
- A 12 b 75 MS/s pipelined ADC using open-loop residue amplification (2003, methodology): “shows a conceptual single-ended block diagram of the first pipeline stage in the original state-of-the-art reference design [15].”