Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip
By A. Atabaki, S. Moazeni, F. Pavanello, H. Gevorgyan, J. Notaros, L. Alloatti, M. Wade, Chen Sun, S. Kruger, H. Meng and 8 more. Nature, 2018
828 citations recorded by the source corpus.
Electronic and photonic technologies have transformed our lives—from computing and mobile devices, to information technology and the internet. Our future demands in these fields require innovation in each technology separately, but also depend on our ability to harness their complementary physics through integrated solutions1,2. This goal is hindered by the fact that most silicon nanotechnologies—which enable our processors, computer memory, communications chips and image sensors—rely on bulk silicon substrates, a cost-effective solution with an abundant supply chain, but with substantial limitations for the integration of photonic functions. Here we introduce photonics into bulk silicon complementary metal–oxide–semiconductor (CMOS) chips using a layer of polycrystalline silicon deposited on silicon oxide (glass) islands fabricated alongside transistors. We use this single deposited layer to realize optical waveguides and resonators, high-speed optical modulators and sensitive avalanche photodetectors. We integrated this photonic platform with a 65-nanometre-transistor bulk CMOS process technology inside a 300-millimetre-diameter-wafer microelectronics foundry. We then implemented integrated high-speed optical transceivers in this platform that operate at ten gigabits per second, composed of millions of transistors, and arrayed on a single optical bus for wavelength division multiplexing, to address the demand for high-bandwidth optical interconnects in data centres and high-performance computing3,4. By decoupling the formation of photonic devices from that of transistors, this integration approach can achieve many of the goals of multi-chip solutions5, but with the performance, complexity and scalability of ‘systems on a chip’1,6–8. As transistors smaller than ten nanometres across become commercially available9, and as new nanotechnologies emerge10,11, this approach could provide a way to integrate photonics with state-of-the-art nanoelectronics. A way of integrating photonics with silicon nanoelectronics is described, using polycrystalline silicon on glass islands alongside transistors on bulk silicon complementary metal–oxide–semiconductor chips.
Subfields: Atomic and Molecular Physics, and Optics, Electrical and Electronic Engineering, Materials Chemistry
View Paper: https://www.semanticscholar.org/paper/04feb8a7e7d874dc5d881189ecbe5c630c969421
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In Atomic and Molecular Physics, and Optics
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- Yun-Feng Xiao
- Alexander Sludds
- Hon Ki Tsang
- John G. Rarity
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- Liane Bernstein
In Electrical and Electronic Engineering
- M. G. Thompson
- Jianwei Wang
- Haisheng Rong
- Justin C. Norman
- John E. Bowers
- Yun-Feng Xiao
- Alexander Sludds
- Hon Ki Tsang
In Materials Chemistry
Citations in the corpus
- Chip-to-chip quantum teleportation and multi-photon entanglement in silicon (2019, background): “Moreover, silicon offers the unique capability of integrating electronics and photonics [37], promising large-scale integration of quantum circuits [13] and their efficient quantum control.”
- High-channel-count 20 GHz passively mode-locked quantum dot laser directly grown on Si with 41 Tbit/s transmission capacity (2018, background): “Large-scale silicon electronic and photonic integrated circuits (EPICs) for inter-chip data communications have been demonstrated with unprecedented performance [5,6].”
- Large-Scale Optical Neural Networks based on Photoelectric Multiplication (2018, background): “Advances in optical interconnects [62, 56, 57] may reduce the I/O energies by large factors [26], translating to further improvements in energy per MAC.”
- A 128 Gb/s PAM4 Silicon Microring Modulator With Integrated Thermo-Optic Resonance Tuning (2019, background): “plications where space and power consumption are constrained and high bandwidth density is required [4]–[6].”