Carbon-nanotube-based voltage-mode multiple-valued logic design

By A. Raychowdhury, Kaushik Roy. IEEE transactions on nanotechnology, 2005

311 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering, Materials Chemistry

View Paper: https://www.semanticscholar.org/paper/fcfb26ba4d1bbde291e34e69cf3b85dd3aaa6789

How researchers see this paper

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In Electrical and Electronic Engineering

1. Fabrizio Lombardi
2. Yong-Bin Kim
3. Sheng Lin

In Materials Chemistry

1. Fabrizio Lombardi
2. Yong-Bin Kim
3. Sheng Lin

Citations in the corpus

• CNTFET-Based Design of Ternary Logic Gates and Arithmetic Circuits (2011, methodology): “08e − 17 J, and the PDP of the STI in [5] is 2.”