Parallel programming of an ionic floating-gate memory array for scalable neuromorphic computing
By E. J. Fuller, Scott T. Keene, Armantas Melianas, Zhongrui Wang, S. Agarwal, Yiyang Li, Yaakov Tuchman, C. D. James, M. Marinella, J. J. Yang and 2 more. Science, 2019
637 citations recorded by the source corpus.
Ionic floating-gate memories Digital implementations of artificial neural networks perform many tasks, such as image recognition and language processing, but are too energy intensive for many applications. Analog circuits that use large crossbar arrays of synaptic memory elements represent a low-power alternative, but most devices cannot update the synaptic weights uniformly or scale to large array sizes. Fuller et al. developed an integrated device, ionic floating-gate memory, that has the gate terminal of a redox transistor electrically connected to a diffusive memristor. This low-power device enabled linear and symmetric weight updates in parallel over an entire crossbar array at megahertz rates over 109 write-read cycles. Science, this issue p. 570 A low-power artificial neural network is enabled by crossbar arrays of redox-transistor memories and diffusive memristors. Neuromorphic computers could overcome efficiency bottlenecks inherent to conventional computing through parallel programming and readout of artificial neural network weights in a crossbar memory array. However, selective and linear weight updates and <10-nanoampere read currents are required for learning that surpasses conventional computing efficiency. We introduce an ionic floating-gate memory array based on a polymer redox transistor connected to a conductive-bridge memory (CBM). Selective and linear programming of a redox transistor array is executed in parallel by overcoming the bridging threshold voltage of the CBMs. Synaptic weight readout with currents <10 nanoamperes is achieved by diluting the conductive polymer with an insulator to decrease the conductance. The redox transistors endure >1 billion write-read operations and support >1-megahertz write-read frequencies.
Subfields: Electrical and Electronic Engineering, Renewable Energy, Sustainability and the Environment
View Paper: https://www.semanticscholar.org/paper/e89486c288b797be2af3529edb0862dd6f6a48d0
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Electrical and Electronic Engineering
Citations in the corpus
- Logic-in-Memory Based on an Atomically Thin Semiconductor (2020, positive): “Among them, in-memory computing, using the same basic device structure for logic operations and data storage 1,2 , is presenting itself as an ideal hardware architecture for tackling portable data-intensive 20,21 and adaptative logic applications 22 .”
- Gate-tunable van der Waals heterostructure for reconfigurable neural network vision sensor (2020, positive): “The vdW vertical heterostructures formed by stacking different 2D materials accommodate an abundance of electronic and optoelectronic properties (21-32), which may be exploited to mimic hierarchical architecture and functions of retinal neurons (33-43) in a natural manner to implement a neural netwo”
- The Past, the Present, and the Future of Ferroelectric Memories (2020, neutral): “for massive parallel operation [100].”