Bulk Disambiguation of Speculative Threads in Multiprocessors

By Luis Ceze, James Tuck, Josep Torrellas, Călin Caşcaval. International Symposium on Computer Architecture, 2006

321 citations recorded by the source corpus.

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

STAMP: Stanford Transactional Applications for Multi-Processing (2008, methodology): “Signatures 2048 bits per signature register Provides conflict detection for hybrid TM systems Hash functions: (1) Unpermuted cache line address (2) Cache line address permuted as in [9] (3) Address from (2) shifted right by 10 bits (4) Permuted lower 16 bits of cache line address”
LogTM-SE: Decoupling Hardware Transactional Memory from Caches (2007, background): “Bulk [7] decouples conflict detection by recording read-”
An effective hybrid transactional memory system with strong isolation guarantees (2007, methodology): “The SigTM write-set does not re-Feature (2) cache line address permuted as in [5]”
Transactional Memory, 2nd edition (2010, methodology): “’s Bulk system [53] introduced the use of read and write signatures to track the read and write sets of a transaction, specifically to avoid changing the cache design to track transactional accesses.”
Transactional memory (2010, methodology): “Version management detection Lazy Eager Lazy TCC [9, 52, 53, 54], Bulk [27] and BulkSC [28], TM Semantics [55, 56], Scalable-TCC [57], FlexTM [51] No hardware trans-actional memory proposals.”