x86-TSO

By Peter Sewell, Susmit Sarkar, Scott Owens, Francesco Zappa Nardelli, Magnus O. Myreen. Communications of the ACM, 2010

415 citations recorded by the source corpus.

Subfields: Computer Networks and Communications, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/e12c81e6ad5d11031e26e532a0ef409f0672e10c

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Computer Networks and Communications

1. Brandon Lucia
2. Adam Morrison
3. Josep Torrellas
4. Jiho Choi
5. Christopher W. Fletcher
6. Benjamin Ransford
7. Dimitrios Skarlatos
8. Mengjia Yan

In Hardware and Architecture

1. Brandon Lucia
2. Josep Torrellas
3. Christopher W. Fletcher
4. Benjamin Ransford
5. Mengjia Yan

Citations in the corpus

• A simpler, safer programming and execution model for intermittent systems (2015, background): “Third, specialized hardware support requiring ISA changes raises new pro-grammability barriers and complicates compiler design [1, 32].”
• InvisiSpec: Making Speculative Execution Invisible in the Cache Hierarchy (2018, background): “Total Store Order (TSO) [12], [13] is the memory model of the x86 architecture.”