TILOS: A posynomial programming approach to transistor sizing
By J. Fishburn, A. Dunlop. International Conference on Computer Aided Design, 2003
373 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/dc1b5cf7f0af132b1816a8452d8823bac71f2d65
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In Electrical and Electronic Engineering
- Stephen P. Boyd
- Seung-Jean Kim
- Lieven Vandenberghe
- Arash Hassibi
- Thomas H. Lee
- M. Hershenson
- Sunil Kandukuri
- D. P. Palomar
In Hardware and Architecture
- Thomas H. Lee
- Arash Hassibi
- M. Hershenson
- Stephen P. Boyd
- Lieven Vandenberghe
- Sunil Kandukuri
- Seung-Jean Kim
Citations in the corpus
- A tutorial on geometric programming (2007, methodology): “Wire sizing using Elmore delay goes back to Fishburn and Dunlop [60]; for some more recent work on wire (and device) sizing via Elmore delay, see, e.”
- Optimal power control in interference-limited fading wireless channels with outage-probability specifications (2002, methodology): “Geometric programs were introduced by Duffin [26]; recent applications include wire and transistor sizing for digital circuits [27] and op-amp design [28]; see [29].”
- Optimal design of a CMOS op-amp via geometric programming (2001, methodology): “To carry out the designs in this paper, we implemented, in MATLAB, a simple and crude primal barrier method for solving the convex form problem.”