Automated Synthesis of Optimized Circuits for Secure Computation

By Daniel Demmler, Ghada Dessouky, Farinaz Koushanfar, Ahmad-Reza Sadeghi, Thomas Schneider, Shaza Zeitouni. 2015

99 citations recorded by the source corpus.

Subfields: Artificial Intelligence, Hardware and Architecture

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Citations in the corpus

QUOTIENT: Two-Party Secure Neural Network Training and Prediction (2019, background): “In fact, it is so important that previous works have used digital synthesizers for this task [10].”
Privacy-Preserving Distributed Linear Regression on High-Dimensional Data (2017, methodology): “However, efficient implementations of IEEE 754compliant secure MPC protocols are a subject of on-going research [17, 61], with the current state-of-the-art yielding 32 bit floating-point multiplication circuits running in time comparable to computers from the 1960’s [68].”
Chameleon: A Hybrid Secure Computation Framework for Machine Learning Applications (2018, methodology): “All the circuits are depth-optimized as described in [32] to incur the least latency during the protocol execution.”
Blind Justice: Fairness with Encrypted Sensitive Attributes (2018, methodology): “Several generic protocols for MPC exists, such as the ones based on arithmetic sharing (Damg˚ard et al., 2012), garbled circuits (Yao, 1986), or GMW (Goldreich et al., 1987), with several available implementations (Demmler et al., 2015b; Zahur & Evans, 2015b).”
Secure Linear Regression on Vertically Partitioned Datasets (2016, background): “For example, recent advances have provided proof-of-concept implementations of floating point primitives using garbled circuits [11].”
CrypTFlow: Secure TensorFlow Inference (2019, background): “Furthermore, it is well-known that ﬂoating-point operations are much more inefﬁcient than ﬁxed-point when evaluated securely ([45], [44]) – we re-conﬁrm this by performing two-party secure multiplication [21] using both ﬁxed-point and ﬂoating-point arithmetic to showcase the difference.”
SoK: General Purpose Compilers for Secure Multi-Party Computation (2019, methodology): “A follow-up to TinyGarble [51] leverages hardware logic synthesis tools to optimze for GMW-style computations.”