VLSI Test Principles and Architectures: Design for Testability (Systems on Silicon)

By Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen. 2006

550 citations recorded by the source corpus.

View Paper: https://www.semanticscholar.org/paper/d92a1fc0a15cc63a498f3b4be62fb879d2873bc7

Citations in the corpus

• Survey of low power testing of VLSI circuits (2012, unknown): “The low power test data compression techniques can be divided into three main categories [22]: coding-based techniques, linear-decompression-based techniques (LFSR reseeding techniques) and broadcast-scan-based technique.”