MERO: A Statistical Approach for Hardware Trojan Detection

By Rajat Subhra Chakraborty, F. Wolff, Somnath Paul, C. Papachristou, Swarup Bhunia. Workshop on Cryptographic Hardware and Embedded Systems, 2009

465 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/d5fa6d24d1a31ba98ab8c78fd18fbcb3584a907a

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Electrical and Electronic Engineering

1. Seetharam Narasimhan
2. Swarup Bhunia
3. Rajat Subhra Chakraborty
4. Joseph Clements
5. Yingjie Lao

In Hardware and Architecture

1. Seetharam Narasimhan
2. Swarup Bhunia
3. Rajat Subhra Chakraborty
4. Joseph Clements
5. Yingjie Lao

Citations in the corpus

• A Comprehensive Study of Security of Internet-of-Things (2017, unknown): “proposed MERO [93], an efficient”
• Hardware Trojan Attacks: Threat Analysis and Countermeasures (2014, background): “Unlike an STH, a hardware Trojan is virtually impossible to remove from a chip after fabrication and hence can be extremely difficult to remedy during field operation.”
• Hardware Trojan: Threats and emerging solutions (2009, background): “However, existing stateof-the-art approaches do not allow destructive verification of ICs to be scalable [6].”