An architecture for exploiting multi-core processors to parallelize network intrusion prevention
By Robin Sommer, Vern Paxson, Nicholas C. Weaver. IEEE Sarnoff Symposium, 2007
431 citations recorded by the source corpus.
Subfields: Computer Networks and Communications, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/d54ae0410159e4d871232316b776247a75b2f832
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Computer Networks and Communications
- Jack J. Dongarra
- J. Langou
- José Luis Vázquez-Poletti
- Jesús Carretero
- Alberto Nuñez
- Agustín Carlos Caminero
- Ignacio Martín Llorente
- Gabriel G. Castañé
In Hardware and Architecture
Citations in the corpus
- iCanCloud: A Flexible and Scalable Cloud Infrastructure Simulator (2012, methodology): “So, a new layer on top of GridSim was implemented to add the ability to simulate clouds.”
- A Class of Parallel Tiled Linear Algebra Algorithms for Multicore Architectures (2007, methodology): “If an unblocked algorithm is used to perform the DTSQRT and DSSRFB subroutines (as suggested in [4]), this tiled algorithm has a total cost that is 25% higher than the cost of the LAPACK block algorithm (see [4] for details), i.”