Understanding the effect of PCB layout on circuit performance in a high frequency gallium nitride based point of load converter

By D. Reusch, J. Strydom. Applied Power Electronics Conference, 2013

160 citations recorded by the source corpus.

Subfields: Condensed Matter Physics, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/c8df9c98b9a0cc47f5c0644d5992ffe5426c233a

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In Electrical and Electronic Engineering

1. Zheyu Zhang
2. Hongchang Li
3. Fei Wang

Citations in the corpus

• A Multiloop Method for Minimization of Parasitic Inductance in GaN-Based High-Frequency DC–DC Converter (2017, background): “For power loop parasitic inductance, the layout can be divided into two categories: Lateral structure and vertical structure [22]–[28].”
• Overview of Silicon Carbide Technology: Device, Converter, System, and Application (2016, background): “All these parasitics can significantly impact the switching performance of power devices, especially for the fast switching SiC devices [90], [91].”