Low-Power Digital Signal Processing Using Approximate Adders
By Vaibhav Gupta, Debabrata Mohapatra, Anand Raghunathan, Kaushik Roy. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2013
821 citations recorded by the source corpus.
Subfields: Biomedical Engineering, Electrical and Electronic Engineering, Signal Processing
View Paper: https://www.semanticscholar.org/paper/c1c9039e99620ee69c110e0cd6e3e39c5af68bf1
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In Biomedical Engineering
In Electrical and Electronic Engineering
Citations in the corpus
- DRUM: A Dynamic Range Unbiased Multiplier for approximate applications (2015, background): “proposed several approximate adder designs that, by removing some of the logic used in a traditional mirror adder, achieved improved power, area, and performance [3].”
- Approximate computing: An emerging paradigm for energy-efficient design (2013, background): “SC offers advantages such as hardware simplicity and fault tolerance [8].”
- Design of Power and Area Efficient Approximate Multipliers (2017, background): “In [1], approximate full adders are proposed at transistor level and they are utilized in digital signal processing applications.”