System software for persistent memory

By Subramanya R. Dulloor, Sanjay Kumar, A. Keshavamurthy, P. Lantz, D. Reddy, R. Sankaran, Jeffrey R. Jackson. European Conference on Computer Systems, 2014

670 citations recorded by the source corpus.

Subfields: Computer Networks and Communications, Electrical and Electronic Engineering, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/b9d6f56e6d9396306c8c6548776877385923c298

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Citations in the corpus

UNITY: Unified Memory and File Space (2017, methodology): “Storage Mimicry PMFS [11] provides a highly optimized filesystem to NVM and implements fast memory-mapped I/O by avoiding data being copied from NVRAM to DRAM.”
FPTree: A Hybrid SCM-DRAM Persistent and Concurrent B-Tree for Storage Class Memory (2016, methodology): “The same type of emulation system was used in [5, 12, 21].”
Basic Performance Measurements of the Intel Optane DC Persistent Memory Module (2019, methodology): “Over the past decade, they have written a slew of papers proposing new programming models [4, 31], file systems [33, 34, 32, 30, 5, 13], libraries [2, 3, 25], and applications built to exploit the performance and flexibility that NVDIMMs promised to deliver.”
An Empirical Guide to the Behavior and Use of Scalable Persistent Memory (2019, methodology): “Common ways to emulate NVM include adding delays to memory accesses in software [32,36,49], using software emulators [43,47], using software simulation [12,31,40], using hardware emulators such as Intel’s Persistent Memory Emulator Platform (PMEP) [21] to limit latency and bandwidth [54, 55, 60], us”
NOVA: A Log-structured File System for Hybrid Volatile/Non-volatile Main Memories (2016, methodology): “Recent NVMM-based file systems [21] [71] [73] bypass the DRAM page cache and access NVMM directly using a technique called Direct Access (DAX) or eXecute In Place (XIP), avoiding extra copies between NVMM and DRAM in the storage stack.”
NV-Tree: Reducing Consistency Cost for NVM-based Single Level Systems (2015, methodology): “In general, flushing CPU cacheline is necessary to order memory writes and used in almost all the existing NVM-based systems [34, 37, 54, 19].”
A simpler, safer programming and execution model for intermittent systems (2015, background): “PMFS [12] adds a similar persistent-memory (PM) write barrier and implements a ﬁlesystem for block PM.”
In-Memory Big Data Management and Processing: A Survey (2015, methodology): “In addition, file system support enables a transparent utilization of NVRAM as a persistent storage, such as Intel’s PMFS [216], BPFS [203], FRASH [217], ConquestFS [218], SCMFS [219], which also take advantage of NVRAM’s byte addressability.”
Atlas (2014, neutral): “File systems, taking advantage of byte-addressable persistent memory, have been studied [15, 17].”
Alpaca: intermittent execution without checkpoints (2017, background): “…in non-volatile memory, and for building consistent memory and file systems out of byte-addressable non-volatile memory [Coburn et al. 2011; Condit et al. 2009; Doshi and Varman 2012; Dulloor et al. 2014; Moraru et al. 2013; Narayanan and Hodson 2012; Venkataraman et al. 2011; Volos et al. 2011].”