Intel Xeon Phi Coprocessor High Performance Programming

By Jim Jeffers, J. Reinders. 2013

505 citations recorded by the source corpus.

Subfields: Hardware and Architecture

How researchers see this paper

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In Hardware and Architecture

1. Matthew F. Dixon
2. Diego Klabjan
3. Jin Hoon Bang

Citations in the corpus

• Classification-based financial markets prediction using deep neural networks (2016, methodology): “We go further by expressing the back-propagation algorithm in a form that is amenable to fast performance on an Intel Xeon Phi co-processor (Jeffers and Reinders, 2013).”
• Massively parallel unsupervised single-particle cryo-EM data clustering via statistical manifold learning (2016, unknown): “We implemented SML-based clustering in a software package named ROME (Refinement and Optimization based on Machine lEarning), which was optimized against both Intel Xeon multi-core processors and Intel Many-Integrated Core (MIC) Architecture (Jeffers and Reinders, 2013) to enable efficient computati”