On design vulnerability analysis and trust benchmarks development

By Hassan Salmani, M. Tehranipoor, Ramesh Karri. ICCD, 2013

296 citations recorded by the source corpus.

Subfields: Artificial Intelligence, Electrical and Electronic Engineering, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/b24cfff9672c527aab81dff6e36e58e2b5c196e5

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Artificial Intelligence

1. Swarup Bhunia
2. M. Tehranipoor

In Electrical and Electronic Engineering

1. Hassan Salmani
2. Swarup Bhunia
3. M. Tehranipoor
4. Ramesh Karri
5. Arturo Geigel

In Hardware and Architecture

1. Hassan Salmani
2. Swarup Bhunia
3. M. Tehranipoor
4. Ramesh Karri
5. Arturo Geigel

Citations in the corpus

• Benchmarking of Hardware Trojans and Maliciously Affected Circuits (2017, background): “Compared to [6] which only looked at gate-level benchmarks, this paper explores trust benchmarks and vulnerability analysis at different levels of abstraction (RTL, gate, layout, FPGA), introduces attack models for benchmark evaluation and thus, takes a holistic approach towards trust benchmark deve”