An analog VLSI recurrent neural network learning a continuous-time trajectory

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Phased LSTM: Accelerating Recurrent Network Training for Long or Event-based Sequences (2016, background): “Although early work such as [25, 10, 4] has realized the resulting limitations and suggested continuous-time dynamical systems approaches towards RNNs, the great majority of modern RNN implementations uses fixed time steps.”
Learning curves for stochastic gradient descent in linear feedforward networks (background): “In VLSI and other hardware implementations, computation of the gradient may be excessively unwieldy, if not impossible due to unavoidable imperfections in manufacturing [1]-[5].”
A compute-in-memory chip based on resistive random-access memory (2022, unknown): “The registers of the two chains are XORed to generate spatially uncorrelated random numbers 51 .”
A Survey of Neuromorphic Computing and Neural Networks in Hardware (2017, unknown): “[1079], [1098], [1148], [1304], [1354], [1538], [2214], [2397],”